RTAS 2014 Program

Time Tuesday, April 15 Wednesday, April 16 Thursday, April 17
08:30 Keynote Keynote Keynote
10:00 Coffee break Coffee break Coffee break
10:30 Session I – Software Architectures and Systems Session IV – Memory and Cache Management Session VI – H/W-S/W Interaction
12:30 Lunch Lunch Lunch
13:30 Session II – Scheduling I INDUSTRIAL SESSION Session VII – Scheduling II
15:00 Coffee break Coffee break
15:30 Session III – Mixed Criticality Systems Coffee break
16:00 Session V – Timing Analysis Session VIII – Embedded Systems and
17:00 Poster & Demo session and Reception
17:30 Break
18:00 Dinner
Tuesday, April 15
10:30-12:30 – Session I: Software Architectures and Systems

Chair: Frank Mueller

The Multi-Resource Server for Predictable Execution on Multi-core Platforms

Rafia Inam, Nesredin Mahmud, Moris Behnam, Thomas Nolte and Mikael Sjödin

Towards Certifiable Adaptive Reservations for Hypervisor-based Virtualization

Stefan Groesbrink, Luis Almeida, Mario de Sousa and Stefan M. Petters

FJOS: Practical, Predictable, and Efficient System Support for Fork/Join Parallelism

Qi Wang and Gabriel Parmer

Safer Sloth: Efficient, Hardware-Tailored Memory Protection

Daniel Danner, Rainer Müller, Wolfgang Schröder-Preikschat, Wanja Hofer and Daniel Lohmann

13:30-15:00 – Session II: Scheduling I

Chair: Harini Ramaprasad

Schedulability Tests for Tasks with Variable Rate-Dependent Behaviour under Fixed Priority Scheduling

Robert I. Davis, Timo Feld, Victor Pollex and Frank Slomka

Real-Time Scheduling under Fault Bursts with Multiple Recovery Strategy

Mohammad A. Haque, Hakan Aydin and Dakai Zhu

Hiding Memory Latency Using Fixed Priority Scheduling

Saud Wasly and Rodolfo Pellizzoni

15:30-17:00 – Session III: Mixed Criticality Systems

Chair: Sathish Gopalakrishnan

Relaxing the Synchronous Approach for Mixed-Criticality Systems

Eugene Yip, Matthew Kuo, Partha Roop and David Broman

FlexPRET: A Processor Platform for Mixed-Criticality Systems

Michael Zimmer, David Broman, Chris Shaver and Edward A. Lee

Partitioned Scheduling of Multi-Modal Mixed-Criticality Real-Time Systems on Multiprocessor Platforms

Dionisio de Niz and Linh Thi Xuan Phan

17:00-20:00 – Poster and Demo Session & Reception
Wednesday, April 16
10:30-12:30 – Session IV: Memory and Cache Management

Chair: Gabriel Parmer

Precise Shared Cache Analysis using Optimal Interference Placement

Kartik Nagar and Y. N. Srikant

Selfish-LRU: Preemption-Aware Caching for Predictability and Performance

Jan Reineke, Sebastian Altmeyer, Daniel Grund, Sebastian Hahn and Claire Maiza

Bounding Memory Interference Delay in COTS-based Multi-Core Systems

Hyoseung Kim, Dionisio de Niz, Björn Andersson, Mark Klein, Onur Mutlu and Raj Rajkumar

PALLOC: DRAM Bank-Aware Memory Allocator for Performance Isolation on Multicore Platforms

Heechul Yun, Renato Mancuso, Zheng-Pei Wu and Rodolfo Pellizzoni


[More details may be found here]

Automotive Ethernet real-time predictability

Jan Seyler (Daimler AG)

Deeply Embedded Real-Time Hypervisors for the Automotive Domain

Gary Morgan (ETAS Ltd.)

Guaranteed Services on the Network-on-Chip of a Manycore Processor

Duco van Amstel (Kalray)

Challenges of multicore processors in mixed-criticality systems with focus on temporal aspects

Michael Paulitsch (EADS)

Challenges in WCET prediction

Florian Martin (AbsInt)

Panel Discussion

Moderated by Frank Mueller, NCSU

16:00-17:30 – Session V: Timing Analysis

Chair: Albert Cheng

Trickle: Automated Infeasible Path Detection Using All Minimal Unsatisfiable Subsets

Bernard Blackham, Mark Liffiton and Gernot Heiser

WCET-Aware Dynamic Code Management on Scratchpads for Software-Managed Multicores

Yooseong Kim, David Broman, Jian Cai and Aviral Shrivastava

Architecture-Parametric Timing Analysis

Jan Reineke and Johannes Doerfert

Thursday, April 17
10:30-12:30 – Session VI: H/W-S/W Interaction

Chair: Jian-Jia Chen

Slack-Aware Opportunistic Monitoring for Real-Time Systems

Daniel Lo, Mohamed Ismail, Tao Chen and G. Edward Suh

A Network Virtualization Approach for Performance Isolation in Controller Area Network (CAN)

Christian Herber, Andre Richter, Thomas Wild and Andreas Herkersdorf

AHRB: A High-Performance Time-Composable AMBA AHB Bus

Javier Jalle, Jaume Abella, Eduardo Quiñones, Luca Fossati, Marco Zulianello and Francisco J. Cazorla

MAESTRO: A Time-Driven Embedded Testbed Architecture with Event-Driven Synchronization

Sriram Karunagaran, Karuna P. Sahoo, Jayaraj Poroor and Masahiro Fujita

13:30-15:00 – Session VII: Scheduling II

Chair: Oleg Sokolsky

Overhead-Aware Temporal Partitioning on Multicore Processors

Risat Mahmud Pathan, Per Stenström, Lars-Göran Green, Torbjörn Hult and Patrik Sandin

Scaling Global Scheduling with Message Passing

Felipe Cerqueira, Manohar Vanga and Björn B. Brandenburg

Has Energy Surpassed Timeliness?

Marcus Völp, Marcus Hähnel and Adam Lackorzynski

16:00-17:30 – Session VIII: Embedded Systems and Applications

Chair: Dionisio de Niz

Unifying DVFS and Offlining in Mobile Multicores

Aaron Carroll and Gernot Heiser

STCoS: Software-defined Traffic Control for Smartphones

Yoshikazu Watanabe, Shuichi Karino, Yoshinori Saida, Gen Morita and Takahiro Iihoshi

The ROSACE Case Study: From Simulink Specification to Multi/Many-Core Execution

Claire Pagetti, David Saussié, Romain Gratia, Eric Noulard and Pierre Siron